Printed circuit board with reduced crosstalk noise and method of forming wiring lines on a board to form such a printed circuit board

ABSTRACT

A printed circuit board includes a first wiring line and a second wiring line spaced apart from the first wiring line. The first wiring line has a first portion having a surface which faces the second wiring line and is smaller in area than that of the second portion, so that a crosstalk noise between the first portion of the first wiring line and the second wiring line can be reduced.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention generally relates to printed circuit boardsand methods of forming wiring lines on boards to form such printedcircuit boards, and more particularly, to a printed circuit board withreduced crosstalk noise generated between adjacent two of a plurality ofwiring lines spaced thereon, and a method of forming wiring lines on aboard to form such a printed circuit board.

[0003] 2. Description of the Related Art

[0004] A plurality of wiring lines and electronic components aredisposed on a printed circuit board, so that a crosstalk noise will begenerated between adjacent two of the wiring lines which are notsufficiently spaced. Here, the term “crosstalk noise” refers to a noisewhich is generated when a signal conducted through a signal (wiring)line is induced by an adjacent signal (wiring) line because of acoupling caused by a mutual capacitance or inductance between theadjacent signal (wiring) lines. When a high-frequency clock pulse isemployed as a signal, the problem of false operation caused by such acrosstalk noise will surface.

[0005] For example, according to a wiring layout on a printed circuitboard 1 shown in FIG. 1, a plurality of LSIs 2 a, 2 b, and 2 c areconnected by means of a plurality of wiring lines. In FIG. 1, adjacenttwo of the wiring lines are laid out at a distance X1 from each other ina region 150, adjacent two of the wiring lines which are disposed so asto bypass electronic components 3 a and 3 b are laid out at a distanceX2-1 from each other in a region 160, and adjacent two of the wiringlines which are disposed with high density are laid out at a distanceX2-2 from each other in a region 170.

[0006] Herein, the distance X1 is longer than the distances X2-1 andX2-2. Therefore, the noise level of a crosstalk noise generated betweenthe adjacent two of the wiring lines laid out in the region 150 ishigher than those generated between the adjacent two of the wiring lineslaid out in the region 160 and between the adjacent two of the wiringlines laid out in the region 170.

[0007] In order, to avoid the above drawback, a change in the wiringlayout is generally made so as to lengthen the distances X2-1 and X2-2,which in turn, requires a greater wiring region or multiple wiringlayers.

[0008] Hereinafter, a distance between two adjacent wiring lines isreferred to as a pattern pitch.

SUMMARY OF THE INVENTION

[0009] It is a general object of the present invention to provide aprinted circuit board and a method of forming wiring lines on a board toform such a printed circuit board in which the above disadvantages areeliminated.

[0010] A more specific object of the present invention is to provide ahigh-density printed circuit board with reduced crosstalk noise and amethod of forming wiring lines on a board to form such a printed circuitboard.

[0011] The above objects of the present invention are achieved by aprinted circuit board including a first wiring line and a second wiringline spaced apart from the first wiring line, wherein the first wiringline has first and second portions, the first portion having a surfacewhich faces the second wiring line and is smaller in area than that ofthe second portion.

[0012] The above objects of the present invention are achieved by aprinted circuit board including a first wiring line and a second wiringline spaced apart from the first wiring line, wherein the first wiringline has a first portion having a surface which faces the second wiringline and is smaller in area than a surface of the second wiring linewhich faces the first portion of the first wiring line.

[0013] According to the above structures, the area of the overlappingpart of the facing surfaces of adjacent two of wiring lines per unitlength of a wiring line can be reduced so as to reduce a crosstalk noisebetween the adjacent two wiring lines.

[0014] The above objects of the present invention are also achieved by amethod of forming wiring lines on a board to form a printed circuitboard including the steps of forming the wiring lines of a predetermineduniform thickness, and etching a first wiring line thereof so that thefirst wiring line has a first portion thinner than a second portionthereof.

[0015] The above objects of the present invention are also achieved by amethod of forming wiring lines on a board to form a printed circuitboard including the steps of forming the wiring lines of a predetermineduniform thickness, and applying a conductive material on a first wiringline thereof so that the first wiring line has a first portion thickerthan a second portion thereof.

[0016] The above objects of the present invention are also achieved by amethod of forming wiring lines on a board to form a printed circuitboard including the steps of forming the wiring lines of a predetermineduniform thickness, and grinding a first wiring line thereof so that thefirst wiring line has a first portion thinner than a second portionthereof.

[0017] According to the above methods, the printed circuit boards of thepresent invention may properly be formed.

BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Other objects, features and advantages of the present inventionwill become more apparent from the following detailed description whenread in conjunction with the accompanying drawings, in which:

[0019]FIG. 1 is a diagram showing a conventional wiring layout on aprinted circuit board;

[0020]FIG. 2A is a partial cross-sectional view of a printed circuitboard according to a first embodiment of the present invention;

[0021]FIGS. 2B and 2C are partial perspective views of wiring linesformed on the printed circuit board of FIG. 2A;

[0022]FIG. 3A is a partial cross-sectional view of a printed circuitboard according to a second embodiment of the present invention;

[0023]FIG. 3B is a partial perspective view of wiring lines formed onthe printed circuit board of FIG. 3A;

[0024]FIG. 4 is a partial cross-sectional view of a printed circuitboard according to a third embodiment of the present invention;

[0025]FIGS. 5A through 5D are diagrams illustrating a method of formingwiring lines on a board to form a printed circuit board according to afourth embodiment of the present invention;

[0026]FIGS. 6A through 6D are diagrams illustrating a method of formingwiring lines on a board to form a printed circuit board according to afifth embodiment of the present invention;

[0027]FIGS. 7A and 7B are diagrams illustrating a method of formingwiring lines on a board to form a printed circuit board according to asixth embodiment of the present invention; and

[0028]FIGS. 8A through 8E are diagrams illustrating a method of formingwiring lines on a board to form a printed circuit board according to aseventh embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0029] In the following, embodiments of the present invention will bedescribed with reference to the accompanying drawings.

[0030] A description will first be given of a formula to calculate acoefficient K which indicates the amplitude of a crosstalk noise. Thenoise level of the crosstalk noise generated in any portion of a printedcircuit board can be estimated by using the following formula. As thecoefficient K becomes greater, the level of the crosstalk noise becomeshigher.

K=(Lm/Lo+Cm/Co)×Td×l×(dV/dt)

[0031] In the above formula, K is the coefficient to indicate theamplitude of the crosstalk noise, Lm is a mutual inductance between twoadjacent wiring lines per unit length of a wiring line (unit: H), Lo isan inductance of one of the two adjacent wiring lines per unit length ofa wiring line (unit: H), Cm is a mutual capacitance between the twoadjacent wiring lines per unit length of a wiring line (unit: F), Co isa capacitance of one of the two adjacent wiring lines per unit length ofa wiring line (unit: F), Td is a propagation delay time per unit lengthof a wiring line (unit: m/s), 1 is a length of a coupled portion of oneof the two adjacent wiring lines (unit: m), V is the amplitude of asignal source (unit: V), and t is time (unit: s).

[0032] Further, Cm is given as Cm=∈×Sm/dm, wherein ∈ is the dielectricconstant of an insulator between the two adjacent wiring lines, Sm isthe area of the overlapping part of the surfaces facing each other, orfacing surfaces, of the two adjacent wiring lines per unit length of awiring line, and dm is a distance between the facing surfaces of the twoadjacent wiring lines. Moreover, Co is given as Co=∈×So/do, wherein a isthe dielectric constant of an insulator between the two adjacent wiringlines and a GND (ground) layer, So is the area of the overlapping partof the facing surfaces of one of the two adjacent wiring lines and theGND layer, and do is a distance between one of the two adjacent wiringlines and the GND layer.

[0033] In the present invention, according to the above formula, thevalue of K can be reduced, so as to lower the noise level of a crosstalknoise, by reducing Lm and Cm by setting the area Sm required to set thelevel of the crosstalk noise to a level equal to or lower than a desiredlevel when other values such as dm, ∈, and So cannot be changed, thatis, Lo and Co remain constant.

[0034] A description will now be given, with reference to FIGS. 2Athrough 2C, of a structure of a printed circuit board 22 according to afirst embodiment of the present invention.

[0035]FIG. 2A is a partial cross-sectional view of the printed circuitboard 22 showing surrounding areas of a boundary between a region of awide wiring pattern pitch and a region of a narrow wiring pattern pitch.

[0036] The printed circuit board 22 includes a board 16 having a GNDlayer 12 made of a conductive material, and a core layer 14 made of adielectric material stacked on the GND layer 12. A plurality of wiringlines 26 a through 26 d (or a third, a fourth, a first, and a secondwiring line, respectively) made of a conductive material are disposed onthe board 16, being covered with a prepreg layer 20 made of a dielectricmaterial.

[0037]FIG. 2B is a partial perspective view of the wiring lines 26 a and26 b including the portions thereof of which the cross sections areshown in FIG. 2A. FIG. 2C is a partial perspective view of the wiringlines 26 c and 26 d including the portions thereof of which the crosssections are shown in FIG. 2A.

[0038] As shown in FIG. 2B, the wiring lines 26 a and 26 b have portionsof a height H2 in a region 210 (or a first and a third portion,respectively) and portions of a height H2-1 in a region 220 (or a secondand a fourth portion, respectively). As shown in FIG. 2C, the wiringlines 26 c and 26 d have portions of a height H1 in a region 230 (or afirst and a third portion, respectively) and portions of a height H1-1in a region 240 (or a second and a fourth portion, respectively).

[0039] The wiring lines 26 a and 26 b, as shown in FIG. 2B, have a widerpattern pitch X3 therebetween in the region 210 than a pattern pitchX3-1 therebetween in the region 220. On the other hand, the wiring lines26 c and 26 d, as shown in FIG. 2C, have a narrower pattern pitch X4therebetween in the region 230 than a pattern pitch X4-1 therebetween inthe region 240 as the wiring lines 26 c and 26 d are laid out with highdensity because of the wiring layout restricted by a plurality of wiringlines and electronic components disposed on the board 16 (see FIG. 1).

[0040] The thickness H1 of the wiring lines 26 c and 26 d laid out withthe pattern pitch X4 in the region 230 is thinner than the thicknessH1-1 of the wiring lines 26 c and 26 d laid out with the pattern pitchX4-1 in the region 240. This is because the noise level of a crosstalknoise between the wiring lines 26 c and 26 d is estimated from the abovedescribed formula to calculate K to be improperly higher in the region230 than in the region 240 because of the narrow pattern pitch X4according to the wiring layout if the thickness of the wiring lines 26 cand 26 d remain the thickness H1-1. Accordingly, the thickness H1 is setso as to obtain a desired value of K indicating a desired low noiselevel of the crosstalk noise therebetween in the region 230, thusallowing a high-density wiring layout therein.

[0041] On the other hand, the thickness H2 of the wiring lines 26 a and26 b laid out with the pattern pitch X3 in the region 210 is thickerthan the thickness H2-1 of the wiring lines 26 a and 26 b laid out withthe pattern pitch X3-1 in the region 220. This is because the noiselevel of a crosstalk noise between the wiring lines 26 a and 26 b isestimated from the above described formula to be lower in the region 210than in the region 220 because of the wide pattern pitch X3 according tothe wiring layout if the thickness of the wiring lines 26 a and 26 bremain the thickness H2-1. Accordingly, the thickness H2 is set within agiven range so that the noise level of the crosstalk noise will notbecome improperly high. The thickness H1-1 is equal to the thicknessH2-1 since wiring lines are usually formed so as to have the samethickness.

[0042] According to the printed circuit board 22 having the abovestructure, the area Sm of the overlapping part of the facing surfaces ofthe wiring lines 26 c and 26 d per unit length is smaller in the region230 than in the region 240. This is because the wiring lines 26 c and 26d each have the thinner thickness H1 in the region 230 than thethickness H1-1 in the region 240. Therefore, a mutual capacitancebetween the wiring lines 26 c and 26 d per unit length in the region 230is smaller than that between wiring lines of the thickness H1-1 per unitlength which are laid out with the pattern pitch X4. Thus, the value ofK obtained from the above formula becomes a desired value small enoughto lower the noise level of the crosstalk noise between the wiring lines26 c and 26 d in the region 230 to the extent that no problem isincurred.

[0043] If the pattern pitch X4 is replaced with the pattern pitch X4-1between the wiring lines 26 c and 26 d in the region 230 in the abovecase, the crosstalk noise therebetween will further be reduced.

[0044] On the other hand, the wiring lines 26 a and 26 b are laid outwith the wider pattern pitch X3 in the region 210 than the pattern pitchX3-1 in the region 220, and have the thicker thickness H2 in the region210 than the thickness H2-1 in the region 220. Therefore, when thewiring lines 26 a through 26 d are connected to make a continuouscircuit, for example, increases in the resistances of the thinnerportions, or the first and third portions, respectively, of the wiringlines 26 c and 26 d in the region 230 are offset by decreases in theresistances of the thicker portions, or the first and third portions,respectively, of the wiring lines 26 a and 26 b in the region 210. Inthis case, the pattern pitch X3 may also be set as short as the patternpitch X3-1 in the region 210 with the thickness H2 being replaced withthe thickness H2-1, thus allowing a high-density wiring layout in theregion 210.

[0045] The above will become clearer when the wiring lines 26 a and 26 care different portions of the same wiring line, and the wiring lines 26b and 26 d are different portions of the same wiring line.

[0046] A description will now be given, with reference to FIGS. 3A and3B, of a structure of a printed circuit board 28 according to a secondembodiment of the present invention.

[0047]FIG. 3A is a partial cross-sectional view of the printed circuitboard 28, on which a plurality of wiring lines 32 a through 32 e arearranged, showing a region of narrow wiring pattern pitches. FIG. 3B isa partial perspective view of the wiring lines 32 a and 32 b includingthe portions thereof of which the cross sections are shown in FIG. 3A.

[0048] As shown in FIG. 3A, the wiring lines 32 a through 32 e arearranged on the board 16 with the pattern pitches X4, which is describedin the first embodiment, in a region 310. The wiring lines 32 a, 32 c,and 32 e has a thickness H3 which corresponds to the thickness H1-1 orH2-1 described in the first embodiment, and the wiring lines 32 b and 32d has the thickness H1 described in the first embodiment, which isthinner than the thickness H3. That is, the wiring line 32 b, as well asthe wiring line 32 d, is formed to have a portion of the thinnerthickness H1 (or a first portion) in the region 310 compared with theother wiring lines 32 a, 32 c, and 3 e.

[0049] The wiring lines 32 b and 32 d are laid out between the wiringlines 32 a and 32 c, and between the wiring lines 32 c and 32 e,respectively, so that each of the wiring lines having the thickness H3will be placed adjacently to each of the wiring lines having thethickness H1.

[0050] Therefore, for example, the area Sm of the overlapping part ofthe facing surfaces of the wiring line 32 a (or a second wiring line)and the wiring line 32 b (or a first wiring line) per unit length issmaller than that of the overlapping part of the facing surfaces ofwiring lines of the thickness H3 per unit length which are laid out withthe pattern pitch X4 (See FIG. 3B). Thus, a mutual capacitance betweenthe adjacent wiring lines 32 a and 32 b is smaller than that between theabove wiring lines of the thickness H3 per unit length which are laidout with the pattern pitch X4, making the value of K obtained from theabove formula a desired small value. The same holds true for the otherpairs of the adjacent wiring lines shown in FIG. 3A.

[0051] According to the printed circuit board 28 having the abovestructure, in a region wherein wiring lines are laid out with thepattern pitches X4, the noise level of a crosstalk noise generatedbetween adjacent two of the wiring lines is lowered to the extent thatno problem is incurred.

[0052]FIG. 4 is a partial cross-sectional view of a printed circuitboard 100 showing a region wherein wiring lines are laid out withextremely narrow pattern pitches according to a third embodiment of thepresent invention.

[0053] Wiring lines 104 a through 104 e correspond, for example, to thewiring lines 26 c and 26 d of the first embodiment, and are arranged onthe board 16 with extremely narrower pattern pitches X5 than the patternpitch X4 of the first embodiment. For the convenience of a description,a wiring line L having the thickness H3 described in the secondembodiment is shown by dotted lines over the wiring line 104 a in FIG.4. In this case, the wiring line 104 a is formed by trimming off bothshoulder portions of a wiring line having the thickness H4 slightlythinner than the wiring line L so as to have a triangularcross-sectional shape with slopes 104 a 1 and 104 a 2. Therefore, thethickness H4 between the surface of the board 16 and a top portion 104 a3 of the wiring line 104 a is thinner than the thickness H3. The otherwiring lines 104 b through 104 e have the same cross-sectional shape andslopes as the above described wiring line 104 a.

[0054] The adjacent wiring lines 104 a and 104 b are laid out with theslope 104a2 and a slope 104b1 facing each other to form a V shapebetween the wiring lines 104 a and 104 b. Therefore, a distance dmbetween the slopes 104 a 2 and 104 b 1 gradually extends toward the topportion 104 a 3 and a top portion 104 b 3. Thus, a mutual capacitancebetween the adjacent wiring lines 104 a and 104 b is smaller than thatbetween adjacent wiring lines having rectangular cross-sectional shapeswhich are laid out with the pattern pitch X5, making the value of Kobtained from the above formula a desired value small enough to lowerthe noise level of the crosstalk noise between the wiring lines 104 aand 104 b to the extent that no problem is incurred. The same holds truefor the other pairs of the adjacent wiring lines shown in FIG. 4.

[0055] According to the printed circuit board 100 having the abovestructure according to the third embodiment of the present invention, ina region wherein wiring lines are laid out with the pattern pitches X5,the level of a crosstalk noise generated between adjacent two of thewiring lines is lowered to the extent that no problem is incurred.

[0056] In this case, the thickness H4 between the surface of the board16 and the top portion 104a3 of the wiring line 104 a may be set asthick as or slightly thicker than the thickness H3 as far as the valueof K is maintained to the desired small value. When the thickness H4 isset as thick as the thickness H3 in the above case, the wiring lines 104a through 104 e can easily be formed only by trimming off both shoulderportions of the wiring line L without changing the thickness. Further,each of the wiring lines 104 a through 104 e may be formed so as to havea trapezoidal cross-sectional shape of which an upper side is shorterthan a lower side thereof remaining in contact with the surface of theboard 16, instead of the triangular cross-sectional shape.

[0057] A description will now be given of a method of forming wiringlines on a board to form a printed circuit board according to a fourthembodiment of the present invention with reference to FIGS. 5A through5D.

[0058] First, a board 38 including a core layer 36 formed on a GND layer(not shown) should first be prepared. Next, as shown in FIG. 5A, aconductive paste made of a conductive material is applied on the board38 so as to form a conductive paste layer 40 thereon. Then, a mask 42 isplaced on the conductive paste layer 40 so as to form a wiring patternthereon.

[0059] Next, after an etching liquid or etchant is sprayed on unmaskedportions of the conductive paste layer 40, the conductive paste layer 40is etched so that wiring lines 44 a through 44 d will be formedaccording to the wiring pattern as shown in FIG. 2B. In this case, everywiring line is formed so as to have a uniform thickness H6.

[0060] Then, a mask 46 is provided so that only the wiring lines 44 cand 44 d will be unmasked as shown in FIG. 5C. Then, each of the wiringlines 44 c and 44 d is etched, after the etching liquid is sprayedthereon, to have a thickness H7, which is thinner than the thickness H6,as shown in FIG. 5D.

[0061] Thereby, formed is a printed circuit board 48 on which the wiringlines 44 a and 44 b, each having the thickness H6, are formed with apattern pitch X9, and the wiring lines 44 c and 44 d, each having thethickness H7, are formed with a pattern pitch X10, which is narrowerthan the pattern pitch X9. Herein, the wiring lines 44 a through 44 dmay be referred to as a first through a fourth wiring line,respectively.

[0062] According to the above method of forming the wiring lines on theboard to form the printed circuit board according to the fourthembodiment of the present invention, the printed circuit board 48 of thepresent invention may properly be formed.

[0063] A description will now be given of a method of forming wiringlines on a board to form a printed circuit board according to a fifthembodiment of the present invention with reference to FIGS. 6A through6D.

[0064] As shown in FIG. 6A, a mask 52 is first placed on a core layer 50so as to form a wiring pattern thereon. Then, a conductive paste made ofa conductive material is applied, or evaporated on unmasked portions ofthe core layer 50 to form wiring lines 54 a through 54 d according tothe wiring pattern as shown in FIG. 6B. In this case, every wiring lineis formed to have a uniform thickness H8.

[0065] Next, a mask 56 is provided so that only the wiring lines 54 aand 54 b will be unmasked as shown in FIG. 6C. Then, the conductivepaste made of the conductive material is applied, or evaporated on thewiring lines 54 a and 54 b so that the wiring lines 54 a and 54 b willbe formed to have a thickness H9, which is thicker than the thicknessH8, as shown in FIG. 6D.

[0066] Thereby, formed is a printed circuit board 55 on which the wiringlines 54 a and 54 b, each having the thickness H9, are formed with apattern pitch X11, and the wiring lines 54 c and 54 d, each having thethickness H8, are formed with a pattern pitch X12, which is narrowerthan the pattern pitch X11. Herein, the wiring lines 54 a through 54 dmay be referred to as a first through a fourth wiring line,respectively.

[0067] According to the above method of forming the wiring lines on theboard to form the printed circuit board according to the fifthembodiment of the present invention, the printed circuit board 55 of thepresent invention may properly be formed as in the case of the abovemethod of forming the wiring lines on the board to form the printedcircuit board according to the fourth embodiment of the presentinvention.

[0068] A description will now be given of a method of forming wiringlines on a board to form a printed circuit board according to a sixthembodiment of the present invention with reference to FIGS. 7A and 7B.

[0069] First, as shown in FIG. 7A, wiring lines 58 a through 58 d areformed according to a wiring pattern on a core layer 57 in the samemethod as described in the above embodiments of the present invention.In this case, every wiring line is formed to have a uniform thicknessH10.

[0070] Next, each of only the wiring lines 58C and 58D is ground byusing a mask or a template to have a thickness H11, which is thinnerthan the thickness H10, as shown in FIG. 7B.

[0071] Thereby, formed is a printed circuit board 60 on which the wiringlines 58 a and 58 b, each having the thickness H10, are formed with apattern pitch X13, and the wiring lines 58 c and 58 d, each having thethickness H11, are formed with a pattern pitch X14, which is narrowerthan the pattern pitch X13. Herein, the wiring lines 58 a through 58 dmay be referred to as a first through a fourth wiring line,respectively.

[0072] According to the above method of forming the wiring lines on theboard to form the printed circuit board according to the sixthembodiment of the present invention, the printed circuit board 60 of thepresent invention may properly be formed as in the case of the abovemethod of forming the wiring lines on the board to form the printedcircuit board according to the fourth embodiment of the presentinvention.

[0073] A description will now be given of a method of forming wiringlines on a board to form a printed circuit board according to a seventhembodiment of the present invention with reference to FIGS. 8A through8E.

[0074] In this method, the wiring lines of the printed circuit board 100shown in FIG. 4 are formed.

[0075] First, a conductive paste made of a conductive material isapplied on the board 16 to form a conductive paste layer 110 thereon,and a mask 120 is placed on the conductive paste layer 110 so as to forma wiring pattern thereon as shown in FIG. 8A.

[0076] Next, as shown in FIG. 8B, the conductive paste layer 110 isetched according to the wiring pattern so as to form wiring lines 111 athrough 111 c, each having the thickness H2 shown in FIG. 2B, with thepattern pitches X4 shown in FIG. 4.

[0077] Next, as shown in FIG. 8C, a mask 121 is provided so as to etchboth shoulder portions of each of the wiring lines 111 a through 111 c.With the mask 121 being provided, portions between the adjacent two ofthe wiring lines 111 a through 111 c, and a center portion along alongitudinal center line of a top surface of each of the wiring lines111 a through 111 c are masked, while the rest of the top surface ofeach of the wiring lines 111 a through 111 c, which corresponds to topsurfaces of both of the shoulder portions thereof, remains unmasked.

[0078] Then, as shown in FIG. 8D, an etching process is performed for apredetermined period of time so that both of the shoulder portions ofeach of the wiring lines 111 a through 111 c will be etched, havingundercuts around a top longitudinal center portion thereof.

[0079] Thereby, as shown in FIG. 8E, formed is a printed circuit board70 on which the wiring lines 111 a through 111 c, each having thethickness H2 and the triangular cross-sectional shape, are formed withthe pattern pitches X5.

[0080] According to the above method of forming the wiring lines on theboard to form the printed circuit board according to the seventhembodiment of the present invention, the printed circuit board 70 of thepresent invention may properly be formed as in the case of the abovemethod of forming the wiring lines on the board to form the printedcircuit board according to the fourth embodiment of the presentinvention.

[0081] The present invention is not limited to the specificallydisclosed embodiments, and variations and modifications may be madewithout departing from the scope of the present invention.

[0082] The present application is based on Japanese priority applicationNo. 11-340815 filed on Nov. 30, 1999, the entire contents of which arehereby incorporated by reference.

What is claimed is:
 1. A printed circuit board comprising: a firstwiring line; and a second wiring line spaced apart from the first wiringline, the first wiring line having first and second portions, the firstportion having a surface which faces the second wiring line and issmaller in area than that of the second portion, so that a crosstalknoise between the first portion of the first wiring line and the secondwiring line can be reduced.
 2. The printed circuit board as claimed inclaim 1, wherein the second wiring line has third and fourth portions,the third portion having a surface which faces the first wiring line andis smaller in area than that of the fourth portion, so that a crosstalknoise between the third portion of the second wiring line and the firstwiring line can be reduced.
 3. The printed circuit board as claimed inclaim 1, wherein the first portion of the first wiring line is thinnerthan the second portion thereof.
 4. The printed circuit board as claimedin claim 2, wherein the first portion of the first wiring line isthinner than the second portion thereof, and the third portion of thesecond wiring line is thinner than the fourth portion thereof.
 5. Theprinted circuit board as claimed in claim 4, wherein the first portionof the first wiring line and the third portion of the second wiring linehave an identical height.
 6. The printed circuit board as claimed inclaim 4, wherein the first portion of the first wiring line faces thethird portion of the second wiring line.
 7. The printed circuit board asclaimed in claim 5, wherein the first portion of the first wiring linefaces the third portion of the second wiring line.
 8. The printedcircuit board as claimed in claim 4, wherein: the first portion of thefirst wiring line faces the third portion of the second wiring line; thesecond portion of the first wiring line faces the fourth portion of thesecond wiring line; and a distance between the first and third portionsis shorter than that between the second and fourth portions.
 9. Theprinted circuit board as claimed in claim 5, wherein: the first portionof the first wiring line faces the third portion of the second wiringline; the second portion of the first wiring line faces the fourthportion of the second wiring line; and a distance between the first andthird portions is shorter than that between the second and fourthportions.
 10. The printed circuit board as claimed in claim 1, whereinthe first portion of the first wiring line has a triangularcross-sectional shape.
 11. The printed circuit board as claimed in claim2, wherein the first portion of the first wiring line and the thirdportion of the second wiring line have a triangular cross-sectionalshape.
 12. The printed circuit board as claimed in claim 11, wherein thefirst portion of the first wiring line and the third portion of thesecond wiring line have an identical height.
 13. The printed circuitboard as claimed in claim 11, wherein the first portion of the firstwiring line faces the third portion of the second wiring line.
 14. Theprinted circuit board as claimed in claim 12, wherein the first portionof the first wiring line faces the third portion of the second wiringline.
 15. The printed circuit board as claimed in claim 1, wherein thefirst portion of the first wiring line has a trapezoidal cross-sectionalshape.
 16. The printed circuit board as claimed in claim 2, wherein thefirst portion of the first wiring line and the third portion of thesecond wiring line have a trapezoidal cross-sectional shape.
 17. Theprinted circuit board as claimed in claim 16, wherein the first portionof the first wiring line and the third portion of the second wiring linehave an identical height.
 18. The printed circuit board as claimed inclaim 16, wherein the first portion of the first wiring line faces thethird portion of the second wiring line.
 19. The printed circuit boardas claimed in claim 17, wherein the first portion of the first wiringline faces the third portion of the second wiring line.
 20. The printedcircuit board as claimed in claim 1, further comprising: a third wiringline; and a fourth wiring line spaced apart from the third wiring line,the third wiring line having first and second portions, the firstportion having a surface which faces the fourth wiring line and islarger in area than that of the second portion.
 21. The printed circuitboard as claimed in claim 20, wherein the fourth wiring line has thirdand fourth portions, the third portion having a surface which faces thethird wiring line and is larger in area than that of the fourth portion.22. The printed circuit board as claimed in claim 20, wherein the firstportion of the third wiring line is thicker than the second portionthereof.
 23. The printed circuit board as claimed in claim 21, whereinthe first portion of the third wiring line is thicker than the secondportion thereof, and the third portion of the fourth wiring line isthicker than the fourth portion thereof.
 24. The printed circuit boardas claimed in claim 23, wherein the first portion of the third wiringline and the third portion of the fourth wiring line have an identicalheight.
 25. The printed circuit board as claimed in claim 23, whereinthe first portion of the third wiring line faces the third portion ofthe fourth wiring line.
 26. The printed circuit board as claimed inclaim 24, wherein the first portion of the third wiring line faces thethird portion of the fourth wiring line.
 27. A printed circuit boardcomprising: a first wiring line; and a second wiring line spaced apartfrom the first wiring line, the first wiring line including a firstportion having a surface which faces the second wiring line and issmaller in area than a surface of the second wiring line which faces thefirst portion of the first wiring line, so that a crosstalk noisebetween the first portion of the first wiring line and the second wiringline can be reduced.
 28. The printed circuit board as claimed in claim27, wherein the first portion of the first wiring line is thinner thanthe second wiring line.
 29. The printed circuit board as claimed inclaim 27, further comprising: a third wiring line; and a fourth wiringline spaced apart from the first wiring line, the third wiring lineincluding a first portion having a surface which faces the fourth wiringline and is larger in area than a surface of the fourth wiring linewhich faces the first portion of the third wiring line.
 30. The printedcircuit board as claimed in claim 29, wherein the first portion of thethird wiring line is thicker than the fourth wiring line.
 31. A methodof forming wiring lines on a board to form a printed circuit board,comprising the steps of: (a) forming the wiring lines of a predetermineduniform thickness; and (b) etching a first wiring line thereof so thatthe first wiring line has a first portion thinner than a second portionthereof.
 32. The method as claimed in claim 31, wherein a second wiringline thereof spaced apart from the first wiring line is etched in thestep (b) so as to have a third portion thinner than a fourth portionthereof.
 33. A method of forming wiring lines on a board to form aprinted circuit board, comprising the steps of: (a) forming the wiringlines of a predetermined uniform thickness; and (b) applying aconductive material on a first wiring line thereof so that the firstwiring line has a first portion thicker than a second portion thereof.34. The method as claimed in claim 33, wherein the conductive materialis applied on a second wiring line thereof spaced apart from the firstwiring line in the step (b) so that the second wiring line has a thirdportion thicker than a fourth portion thereof.
 35. A method of formingwiring lines on a board to form a printed circuit board, comprising thesteps of: (a) forming the wiring lines of a predetermined uniformthickness; and (b) grinding a first wiring line thereof so that thefirst wiring line has a first portion thinner than a second portionthereof.
 36. The method as claimed in claim 35, wherein a second wiringline thereof spaced apart from the first wiring line is ground in thestep (b) so as to have a third portion thinner than a fourth portionthereof.